Senior digital asic design engineer

Werkgever:
IC Resources
Regio:
Rijswijk
 
Functieomschrijving
Overview

Principal Recruitment Consultant at IC Resources - Semiconductor Engineering division


Lees de volgende functieomschrijving zorgvuldig door om er zeker van te zijn dat u de geschikte kandidaat bent voor deze rol voordat u solliciteert.

Working for a major US semiconductor manufacturer, this critical role as senior digital designer in shaping the direction of cutting-edge IP for complex digital-AMS ASIC solutions. You will be part of a global team tasked with the design and development of existing and brand-new products. Taking a major hold in a niche market, and having a unique opportunity to work across the full flow.

Responsibilities
  • Design and development of existing and brand-new products as part of a global team.
  • Contribute to front-end digital design: RTL coding and IP development in Verilog; participate in the full design flow.
  • Engage with analog/mixed-signal interfaces (ADC/DAC, PLL) integration.
  • Work on synthesis, static timing analysis (STA), timing constraints, and back-end processes.
  • Collaborate across teams to drive successful tape-out and delivery of challenging ASIC projects.
  • Scripting and software coding support for design flows (Python, C, SystemC).
Qualifications
  • Degree / Masters / Doctorate in electronics, micro-electronics, physics or related field
  • Strong industry experience with challenging ASIC projects and successful tape-out / delivery
  • Front-end digital design knowledge and fundamentals - RTL coding and IP development in Verilog
  • Understanding of analog / mixed-signal chips or IP - ADC / DAC interfaces, PLL etc
  • Synthesis, static timing analysis (STA), timing constraints
  • Physical implementation and understanding of physical design / back-end processes
  • Scripting & software coding skills - python, C, system C
Bonus / nice-to-have
  • DFT - scan insertion
  • Modeling / simulation in MATLAB / Simulink
  • UVM verification - SystemVerilog, creating test benches, assertions, formal methods
  • Low-power constraints, UPF
Compensation and apply

Excellent salaries, benefits, stocks, bonus, and visa sponsorship are all available for the correctly qualified candidate.

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/

Delft, South Holland, Netherlands


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